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 ST19AF08
Smartcard MCU With 4 additional I/0
DATA BRIEFING
s
ENHANCED 8 BIT CPU WITH EXTENDED ADDRESSING MODES
4 4
s
32 K BYTES OF USER ROM WITH PARTITIONING SYSTEM ROM 960 BYTES OF USER RAM WITH PARTITIONING 8 K BYTES OF USER EEPROM WITH PARTITIONING - Highly reliable CMOS EEPROM submicron technology - 10 years data retention - 100,000 Erase/Write cycles endurance - Separate Write and Erase cycles for fast "1" programming - 1 to 64 bytes Erase or Program SECURITY FIREWALLS FOR MEMORIES VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH PROGRAM 8 BIT TIMER WITH INTERRUPT CAPABILITY 2 SERIAL ACCESS, ISO 7816-3 COMPATIBLE 3V 10% or 5V 10% SUPPLY VOLTAGE POWER SAVING STANDBY MODE CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2 ESD PROTECTION GREATER THAN 5000V
s s
s
4
Micromodule (D4)
4
s s
s s s s s
Wafer
s
October 1999
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
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ST19AF08
HARDWARE DESCRIPTION The ST19AF08, a member of the ST19 device family, is a serial access microcontroller especially designed for very large volume and cost competitive secure portable objects. The ST19AF08 is based on a STMicroelectronics 8 bit CPU core including on-chip memories: 960 Bytes of RAM, 32 K Bytes of USER ROM and 8 K Bytes of EEPROM. RAM, ROM and EEPROM memories can be configured into partitions. Access rules from any memory partition to another partition are setup by the user defined Memory Access Control Logic.
It is manufactured using the highly reliable ST technology. As all other ST19 family members, it is fully compatible with the ISO standards for Smartcard applications. SOFTWARE DESCRIPTION Software development and firmware (ROM code/ options) generation are completed by the ST16-19 HDSE development system.
Figure 1. Block Diagram
RAM 960 Bytes EEPROM 8K Bytes USER ROM 32 K Bytes SYSTEM ROM
MEMORY ACCESS FIREWALL
SYSTEM ROM FIREWALL
INTERNAL BUS
CLOCK GENERATOR MODULE
UNPRE8 BIT
TIMER
SERIAL 8 BIT CPU
I/O INTERFACE
ADDITIONAL USER I/O INTERFACE
SECURITY ADMINISTRATOR
DICTABLE NUMBER GENERATOR
Vcc
CLK
RESET
GND
I/O0 and I/O1
I/OU0 to I/OU3
SCP 146a/DS
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